The enhanced Flash (one type of memory chip) comprising RPMC (Replay Protection Monotonic Counter) is a featured BIOS (Basic Input-Output System) chip launched by Intel. It comprises a SPI (Serial Peripheral Interface) Flash chip having large capacity and a RPMC circuit. The capacity of SPI FLASH chip can be 8 M, 16 M, 32 M, 64 M, 128 M, 256 M or more in which codes and data of CPU (Central Processing Unit) and BIOS are stored; RPMC circuit may guarantee the security and integrity of reading and writing data. The RPMC circuit and the SPI FLASH integrated therein constitute the hardware platform of the BIOS of PC (Personal Computer) system.
At present, when designing the enhanced Flash chip with RPMC function, a designer usually integrates the SPI Flash having large capacity and RPMC into a single chip, which means that the RPMC circuit and the SPI FLASH are designed together.
However, such a design manner has the following disadvantages: since the SPI FLASH and the RPMC are required to be integrated into a single chip, the single chip has a large size and a package thereof has a large size, causing an expensive cost; and the RPMC and the SPI FLASH are designed together, resulting in a complexity and a long period of chip design.